Scalable Unified Processor Enhancing Revolutionary Computing, Harnessing Integrated Performance for Edge AI, Autonomous Driving, Generative AI, and Decentralized AIoT Applications

A project in the HORIZON-EIC-2023-ACCELERATOR-01 call.


The exponential increase in (sensor) data combined with Artificial Intelligence (AI) to support extensive and complex automation requires real-time supercomputing, which today’s semiconductor providers struggle to keep up with.

We have developed a patented companion chip for AI and digital signal processing (DSP), Tyr, to create a paradigm shift in context-aware processing and transform industries such as Autonomous Driving (AD) and the AI of Things. This award-winning technology has exceptional processing power and high implementation efficiency, while consuming low power and cost.

AD, our beachhead market, is a perfect illustration of data availability and processing limitations. There is currently no commercially and technologically viable solution that allows high / full autonomy at Level 4/5. Therefore, we have focused our product development on the global ambition to create L4/5 AD, enabling real-time processing of all data to ensure 100% safety of the vehicle environment.

The Problem

A fully autonomous car must act as a capable human driver and react in a timely and accurate manner in any situation to ensure maximal safety of the vehicle environment and driver. The vehicle must process data from a high number of vehicle sensors and run complex algorithms to build and respond to a dynamic perception model of the surrounding vehicle environment in less than 20ms. This requires enormous computing power. Furthermore, it is crucial that energy consumption is optimised to avoid computers that power self-driving being a huge driver of carbon emissions, and so ensure a green transition within the automotive industry.

AD requires a combination of AI and DSP to process all the data. To date, this has been handled by assembling multiple chips, resulting in high latency and power consumption. Additionally, current solutions can only use <20% of the maximum computing power due to architectural constraints. There are currently no commercially viable suppliers and manufacturers that can process the data required for L4/L5 AD.

It is broadly accepted that seven fundamental requirements are necessary to realise L4/5 AD: [1] Massive compute power efficiently delivered, [2] Very low latency, [3] Minimal energy consumption, [4] A combination of AI and DSP capabilities, [5] Deterministic processing, [6] In-field programmability, and [7] Affordable pricing.

Our Solution

The TYR family (TYR1,2,4) is a companion chip platform used in a central compute unit. TYR is fully programmable and capable of handling current and new AI algorithms. The TYR is semi-autonomous, handling and processing data independently from the main processor, and works asynchronously compared to the main processor.

Daringly speaking: “We add (extra) Brains to (dumb) Computers”.

TYR has high processing power (1+ petaFLOPS), a high implementation efficiency (i.e. the compute power usable at any given time) of 70-80% (in comparison to competing solutions of 20/30%), low power consumption (<50W), low cost, algorithm / host processor agnostic, fully re-programmable using high-level languages throughout the design and with a small silicon footprint.

Co-funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union. Neither the European Union nor the granting authority can be held responsible for them.

Scroll to Top