NEXT GENERATION ALGORITHMS MADE EASY
Transformers, Federated Learning, BEVformer,…
2 PETAOPS / 50 W
HIGH-PERFORMANCE, LOW-POWER
COMPUTING FOR THE VEHICLE
VSORA Solution Features
Pre-determined in the Tyr family – User decided on the IP
- Supports mixed cores (AI and/or DSP) and mixed quantizations.
- Tyr family consists of 2 or more clusters with an AI core and a DSP core.
- User decides number of bits for exponent and mantissa.
- Tyr family uses fp8 for AI and fp24 for DSP.
- Quantization conversion handled on the fly.
- No latency impact on programmable activation functions handled on the fly.
- The new generation of AI algorithms (Transformers, BEVformer,...) fully supported.
- Reduces Time-To-Market and Time-To-Money
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Reduces development cost.
Reduces risk.
IP CORES
UNLIMITED POSSIBILITIES
SINGLE OR MULTI-CORE,
AI, DSP OR AI+DSP
IEEE 754 Floating point with user selectable quantization:
fp8, fp16, fp24, fp32 or any combination you like
Converts to system quantization on the fly
Activation functions handled on the fly
Mobility in 2030 will be autonomous, digital, smart, sustainable and safe. Autonomous driving will become a mass market.
Herbert Diess
CEO Volkswagen AG, 13 July 2021